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september 2011 doc id 18164 rev 2 1/27 AN3303 application note secondary-side rectification fo r an llc resonant converter featuring the srk2000 introduction the evlsrk2000 is a family of demonstration boards designed for the evaluation of the srk2000 in llc resonant converters with synchronous rectification (sr). the first part of this application note is a brief description of the ic features while the second is dedicated to the board description. finally , some considerations regarding circuit optimization and performance are given. this board was realized in four different configurations depending on the mounted sr mosfets. different board codes are shown in ta bl e 1 : figure 1. evlsrk2000: smart driving control for an llc resonant converter table 1. demonstration board ordering codes ordering code sr mosfet p/n mosfet package mosfet r ds(on) mosfet bv dss evlsrk2000-l-40 stl140n4llf5 powerflat? 2.75 m 40 v evlsrk2000-l-60 stl85n6f3 powerflat? 5.70 m 60 v evlsrk2000-d-40 std95n4f3 dpak 5.80 m 40 v evlsrk2000-s-40 sts15n4llf3 so-8 5.00 m 40 v www.st.com
contents AN3303 2/27 doc id 18164 rev 2 contents 1 srk2000 main characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 drain mosfet sensing and driving logic . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 drain sensing optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.3 blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.4 light load operation and sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.5 enable pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2 electrical diagram description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 sensing optimization by wavefo rm check . . . . . . . . . . . . . . . . . . . . . . 14 3.1 power mosfet turn-off compensation . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2 mosfet turn-on delay compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 sub-harmonic oscillation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 how to implement the board in the converter . . . . . . . . . . . . . . . . . . . 17 5 power losses and therma l design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 power losses calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2 thermal design consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
AN3303 list of tables doc id 18164 rev 2 3/27 list of tables table 1. demonstration board ordering codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. evlsrk2000-l-40 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 table 3. evlsrk2000-l-60 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 table 4. evlsrk2000-s-40 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 table 5. evlsrk2000-d-40 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 table 6. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
list of figures AN3303 4/27 doc id 18164 rev 2 list of figures figure 1. evlsrk2000: smart driving control for an llc resonant converter. . . . . . . . . . . . . . . . . . . 1 figure 2. block diagram of an llc converter with synchronous rectification. . . . . . . . . . . . . . . . . . . . 5 figure 3. power mosfet drain voltage sensing and typical waveforms . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. parasitic elements model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 5. effect of parasitic elements on power mosfet turn-off. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 6. effect of parasitic elements on power mosfet turn-on. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 8. duty cycle oscillation when vdvs @ 50 % cycle almost equals vdvs1,2_off . . . . . . . . . 10 figure 9. conduction time sensing during normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 10. conduction time sensing under sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 11. operation mode transitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 12. electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. full load operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 14. full load operation - detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. sr mosfet turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. sr mosfet turn-off - detail. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 17. operation above resonance frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 18. sr mosfet turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 19. sr mosfet turn-on - detail. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 20. duty cycle oscillation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 21. how to implement the board on an existing converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 22. board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
AN3303 srk2000 main characteristics doc id 18164 rev 2 5/27 1 srk2000 main characteristics the main features of the srk2000 are described below. the values of the following parameters are reported in the srk2000 datasheet (see reference 1 ). the srk2000 implements a control scheme specific for secondary-side synchronous rectification in an llc resonant converter that uses a transformer with center-tap secondary winding for full-wave rectification. it provides two high-current gate-drive outputs, each capable of driving one or more n-channel power mosfets in parallel. each gate driver is controlled separately and an interlocking logic circuit prevents the two synchronous rectifier mosfets from conducting simultaneously. figure 2. block diagram of an llc converter with synchronous rectification 1.1 drain mosfet sensing and driving logic the core function of the ic is to switch on each synchronous rectifier mosfet whenever the corresponding transformer half-winding starts conducting (i.e. when the mosfet body diode starts conducting) and then to switch it off when the flowing current approaches zero. for this purpose, the ic is provided with two pins (dvs1 and dvs2) able to sense the power mosfet drain voltage level. because each power mosfet is turned on when its body diode is conducting, zero voltage turn-on is achieved. device operations described below refer to figure 3 . a) when the current isr1 starts flowing through the body diode, the voltage across the power mosfet drain-source becomes negative; as it reaches the negative threshold v th.on , the power mosfet is switched on. the threshold at which the power mosfet turns on can be set by the following formula: equation 1 v thon r d i dvs1 2on , v dvs1 2th , + ? = _
srk2000 main characteristics AN3303 6/27 doc id 18164 rev 2 where i dvs1,2.on is the current sourced out of the dvs1,2 pins (50 a typ.) and v dvs1,2_th is the lower clamp voltage of the dvs1,2 pins (-0.2 v typ.). this may enable the on threshold to be set according to the sr power mosfet body diode v f chosen for the application or the external diode connected in parallel to the power mosfet drain-source (e.g. schottky rectifier). the current sourcing out of the dvs1,2 pin is enabled after the drain-source voltage experiences a voltage be low the pre-triggering level v dvs1,2_pt (negative going edge) and is disabled once the rectifier is switched on. a de-bouncing delay (t pd_on ) is introduced after the current generator is activated in order to avoid false triggering of the gate driver. in some applications, r d1,2 is also needed to limit the current that can be injected into the dvs pins when the corresponding sr power mosfet is off. in fact, when one power mosfet is off (and the other is conducting) its drain-to-source voltage is slightly higher than twice the output voltage; if this exceeds the voltage rating of the internal clamp (vccz = 36 v typ.), rd1,2 has to limit the injected current below the maximum rating (25 ma). in addition , the srk2000 clamping circuit dissipation must be taken into account to avoid device overheating. in this case, equation 1 is used to check that the resulting v th.on is compatible with the forward drop of the sr power mosfet body diode (or the parallel external diode). b) once the power mosfet is turned on, its drain-source voltage drops to: equation 2 which is negative because current flows from source to drain. when this voltage reaches (exceeds) the turn-off threshold v dvs1,2_off , the power mosfet is switched off. the user can set the turn-off threshold selecting between two different values (see reference 1 ) by properly biasing the en pin during the ic startup phase. c) after the power mosfet is switched of f, the current still fl ows through its body diode (causing the drain-source voltage to jump negative) until it becomes zero; then the transformer winding voltage reverses and the drain-source voltage starts increasing. as it exceeds the arming voltage vdvs1,2_a (positive going edge), the gate drive of the second power mosfet is armed and the operation, described above, now app lies to this rectifier. v ds1 2 , r ds on () i sr1 2 , ? =
AN3303 srk2000 main characteristics doc id 18164 rev 2 7/27 figure 3. power mosfet drain voltage sensing and typical waveforms power losses are certainly much higher during phases a) and c), when the secondary current flows through the sr power mosfet body diode, than during phase b), when the current flows through the power mosfet channel. therefore, minimizing phase a) and c) duration is a good way to optimize the efficiency. in the following section, the reason circuit parasitic elements play a fundamental role in this is described. 1.2 drain sensing optimization drain voltage sensing must be very accurate to avoid disturbances and minimize the parasitic elements that can affect it. the most important of these are shown in figure 4 . figure 4. parasitic elements model the stray inductance of the power mosfet leads, internal bonding (l source , l drain ) and pcb trace (l trace ) connecting the power mosfet to the sensing trace, introduces a discrepancy between the sensed voltage and the actual voltage drop across r ds(on) in the effective drain voltage sensing. the contribution of l trace can be minimized by connecting the sensing trace as close as possible to the power mosfet but l drain and l source are power mosfet parameters and cannot be modified externally. as shown on the left-hand side of figure 5 , this error causes an early power mosfet turn-off. this anticipation is partially compensated by the rc formed by the sensing resistor r and the dvs pin !-v 9 '96b37 7 3'b2q *dwh'ulylqj 9 '96b2ii 9 '96b2q 'udlqvrxufh yrowdjh , vu 65. *' 7r;iruphu '96 65 , 65 5 ' 5 * 65. *' 7r;iruphu '96 65 , 65 5 ' 5 * a b c
srk2000 main characteristics AN3303 8/27 doc id 18164 rev 2 capacitance, but it may be necessary to add an external capacitance; in particular when using power mosfet packages with a high associated stray inductance, such as the to- 220. in several cases it can be advantageous to over-compensate with the external capacitor, therefore introducing an additional delay to the power mosfet turn-off. this solution, shown on the right-hand side of figure 5 , reduces the current flowing through the power mosfet body diode increasing the efficiency. power mosfet turn-off fine tuning must be handled carefully because, if the power mosfet is turned off after the drain-source voltage becomes positive, the current reverses and begins flowing from drain-to-source with consequent converter malfunctioning. figure 5. effect of parasitic elements on power mosfet turn-off a second effect associated to the parasitic elements is related to the power mosfet turn- on. before turn-on, at the half-bridge inversion, the corresponding drain voltage starts decreasing; the dvs voltage also drops but the rc formed by the parasitic capacitance of pin dvs (about 10 pf) and the sensing resistors introduces a time constant that slows down the sensed signal. during this phase the power mosfet stray inductance does not contribute because there is no current flowing through it. as illustrated in figure 6 , this results in a late power mosfet turn-on which adversely affects efficiency. this turn-on delay, which is negligible if the se nsing resistor value is indicatively below 1 k , becomes significant in a case where the resistor value is high and, obviously, further increases if an external capacitor is mounte d between the pin and ground as previously indicated. to avoid this effect, a bypass diode can be mounted in parallel to the sensing resistor. in this way, the parasitic capaci tance is discharged through the diode dynamic resistance instead of the sense resistor. a 100-200 resistor in series to the bypass diode is recommended to limit the current sourced from the dvs pins in case sr power mosfet drain voltage goes excessively below ground. !-v 9 '96b2ii '96slq yrowdjh , vu 9 '96b2ii '96slq yr owdjh , vu $fwxdo 5 yrowdjh $fwxdo5 yr owdjh ,1'8&7,9($17,&,3$7,21 &$3$&,7,9('(/$< *dwh'ulylqj *dwh'ulylqj %4 po
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AN3303 srk2000 main characteristics doc id 18164 rev 2 9/27 figure 6. effect of parasitic elements on power mosfet turn-on 1.3 blanking time one peculiarity of resonant converters and in particular of llcs which differentiate them from hard switching topologies, like flyback or forward, is that secondary currents have a sinusoidal shape. this requires handling of the sr with a dedicated logic scheme: as shown in figure 7 , the secondary current is not monotonic and consequently the same current level is crossed twice each half-cycle and the dvs voltage also crosses the turn-off threshold twice. figure 7. blanking time to avoid switch-off after the first crossing, a blanking time is introduced. it is important to point out that this blanking time must be related to the switching period, because the operating frequency can change considerably depending on the converter design and the operating point. in the srk2000, this blanking time is set to 50 % of each half-cycle. there is a peculiar condition that needs highlighting. in many cases, except for some unusual designs operating well below resonance, the secondary current peak value is achieved after 50 % of the half-cycle. depending on the converter design and on power mosfet r ds(on) , at light load the turn-off threshold may happen to be very close to the !-v *dwh'ulylqj 9 '96b2ii '96slq yrowdjh , vu $fwxdo 5 yrowdjh %4 po
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srk2000 main characteristics AN3303 10/27 doc id 18164 rev 2 peak current and, consequently, the turn-off point may jump from one half-cycle to the next between the 50 % limit imposed by the blanking time and the desired turn-off point. the result is a sort of sub-harmoni c oscillation in the duty cycle of the sr power mosfet. this has no significant effect as long as the oscillation amplitude is limited but could cause instability in the case of wider oscillation. fo r this reason the srk2 000 sets the blanking time in track with the switching period, therefore, keep it as close as possible to the peak current. figure 8. duty cycle oscillation when v dvs @ 50 % cycle almost equals v dvs1,2_off 1.4 light load operation and sleep mode a unique feature of the srk2000 is its intellig ent automatic sleep mode . the internal logic circuitry is able to detect a light load conditi on of the converter and stop gate driving, reducing also ic?s quiescent consumption. this improves converter efficiency at light load, where the power losses on the rectification body diodes become lower than the power losses in the power mosfets and those related to their driving. the ic is also able to detect an increase of the converter's load and automatically restart gate driving. the automatic sleep mode detectio n is performed by comparing the duration of a half-cycle to the sr power mosfet conduction time. the duration of a half-cycle is measured by generating a clock signal each time the half-bridge voltage reverts. the ic enters sleep mode when the conduction time of at least one of the two sr power mosfets falls below 40 % of the measured half-period. figure 9 shows details of time measuring for sleep mode entering. to avoid erroneous decisions, this sleep mode condition must be confirmed for 16 consecutive resonant converter switching cycles. !-v 9 '96b2ii , vu 'udlqvrxufh yrowdjh 'xw\f\foh rvfloodwlrq *dwh'ulylqj
AN3303 srk2000 main characteristics doc id 18164 rev 2 11/27 figure 9. conduction time sensing during normal operation once in sleep mode, gate driving is re-enabled when body diode conduction time of both mosfets exceeds 60 % of the half-cycle. figure 10 shows details of time measuring for sleep mode exiting. figure 10. conduction time sensing under sleep mode also in this case the decision is made co nsidering the measurement on eight consecutive switching cycles. furthermore, after each sleep mode entering/exiting transition, the timing is ignored for a certain number of cycles, to let the resulting transient in the output current fade out; then the !-v *' , vu *' 9 '96b2ii , vu +doi&\foh 7 &21'8&7,21 &/. 9 '96b37 'udlq6rxufh yrowdjh 65 'udlq6rxufh yrowdjh 65 !-v *' , vu *' , vu +doi&\foh 7 &21'8&7,21 &/. 9 '96b37 9 '96b2q 'udlq6rxufh yrowdjh 65 'udlq6rxufh yrowdjh 65
srk2000 main characteristics AN3303 12/27 doc id 18164 rev 2 time check is re-enabled. the number of ignored resonant converter switching cycles is 128 after entering sleep mode and 256 after exiting sleep mode. figure 11 shows some examples of operation mode transition. figure 11. operation mode transitions 1.5 enable pin pin en can be used to remotely enable or disable power mosfet driving. a voltage above 1.8 v enables the ic outputs which are otherwise inhibited. by connecting the en pin to vcc through a resi stor divider, the minimum vcc voltage, at which the ic starts driving power mosfets, can be precisely set. if the sr power mosfets are logic level, the ic can start driving as soon as vcc reaches the turn-on threshold (4.5 v), but if the sr power mosfets are standard level, it is better to keep the ic inhibited until the vcc achieves the voltage necessary to properly drive the power mosfets (i.e. 10 v). the en pin has an additional function which allows setting the sr power mosfets turn-off threshold. it is set before the ic starts operating, when vcc ramps up from 0 v to 4.5 v (vccon). during this time window, if the voltage on pin en is below 0.36 v (typ.), the turn-off threshold is set to -25 mv, if it is above ven-th, the threshold is set to -12.5 mv. this function gives the possibility to change the turn-off threshol d according to the sr power mosfet r ds(on) and to the converter operation. details of divider resistor calculation can be found in the srk2000 datasheet. !-v &\fohfrxqw 2xwsxwordg *dwhgulylqj f\fohv! f\fohv ljqruhgf\fohv f\fohv ljqruhgf\fohv f\fohv! ljqruhgf\fohv f\fohv ljqruhgf\fohv 6ohhsprgh 6zlwfklqjprgh
AN3303 electrical diagram description doc id 18164 rev 2 13/27 2 electrical diagram description the board schematic is shown in figure 12 . components were dimensioned supposing an implementation of the sr on a 12 v output converter and using the converter output as supply bus for the srk2000. if the board is used with a different supply voltage, some components should be modified accordingly. c502 is a bypass capacitor mounted between vcc and the sgnd pin, as close as possible to the ic pin, in order to obtain a clean supply voltage for the internal circuitry. c503 is another bypass capacitor from vcc to pgnd working as an energy buffer for the pulsed gate-drive currents. r503, together with c502 and c503, forms an rc filter and smoothes eventual disturbances from the 12 v supply. r504 and r505 polarize the en pin setting the vcc enable voltage to 10 v (see reference 1 ). they are dimensioned to set sr power mosfet turn-off to -12.5 mv. the en pin is externally accessible through the board connector pins #6 and #8 and can be used to force the ic disable. r506 and r507 connect the power mosfet drains to dvs1,2 pins and set the turn-on threshold as previously described. d503 and d505 bypass r506 and r507 before power mosfet turn-on. in this case they are not mounted because the r506 and r507 value is quite low and turn-on delay is negligible. c504 and c505 are intended to introduce an additional delay between the signals on the power mosfet drain and on the sensing pin itself. in this case they are not mounted because they are not strictly necessar y but their contribution is analyzed in section 3 . r501a, d501a, q501a, r502a, d502a, and q502a are optional and they are present only in case paralleled power mosfets are used (evlsrk2000-s-40). figure 12. electrical diagram !-v 6 $2 $2 $2 $2 $2 $2 6 %. %. # n& # n& 2 .- 2 .- 2 k 2 k 1 343.,,& 1 343.,,& $ "!3 $ "!3 3'.$ %. $63 $63 '$ 0'.$ '$ 6## 5 32+ 5 32+ 2 k 2 k # .- # .- 2 2 2 2 2 2 2 2 2 2 2 2 *0 (%!$%2 *0 (%!$%2 2 2 2 2 2 2 2 2 # n& # n& 1 343.,,& 1 343.,,& $ "!3 $ "!3 $! "!3 $! "!3 1! 343.,,& 1! 343.,,& 2! 2 2! 2 $! "!3 $! "!3 2! 2 2! 2 $ .- $ .- $ .- $ .- 1! 343.,,& 1! 343.,,& 28 2 28 2 # .- # .- # u& # u& 2 .- 2 .-
sensing optimization by waveform check AN3303 14/27 doc id 18164 rev 2 3 sensing optimization by waveform check the board has been tested on a 150 w 12 v llc converter (see reference 2 ). the following assertions refer to evlsrk2000-l-40 but similar considerations can be made for all the configurations of evlsrk2000-x-xx. note that current and voltage probes can affect the ic sensing leading to malfunctioning. signal probing must be accomplished carefully and with minimal modification with respect to the original circuit. figure 13 and 14 show key signals of the srk2000: each sr power mosfet is switched on and off according to its drain-source voltage which, during conduction time, is the voltage image of the current flowing through the power mosfet. the measurement resolution is not sufficient to appreciate the turn-off threshold voltage on power mosfet drain but the voltage step changes, corresponding to the power mosfet turn-on and turn-off, can be noted. 3.1 power mosfet turn-off compensation considering the sr power mosfet r ds(on) and the srk2000 turn-off threshold, turn-off current can be approximately calculated as follows: equation 3 actually, this calculation neglects many other factors like the ic driver propagation delay and the r ds(on) deviation due to operative temperature. furthermore, as previously discussed, turn-off timing is heavily influenced by parasitic elements. because it is quite difficult to accurately estima te all these parameters, it is better to confront this issue from a practical point of view. as seen in figure 14 , the power mosfet turns off when significant current is still flowing throug h it, which is diverted to the mosfet body diode. it can be worth delaying the turn-off to increase efficiency. this can be easily figure 13. full load operation figure 14. full load operation - detail ch1: sr fet drain ch3: sr fet current ch2: sr fet gate ch4: primary current ch1: sr fet drain ch3: sr fet current ch2: sr fet gate ch4: primary current i off v dvs1 2off , r ds on () -------------------------------- = _
AN3303 sensing optimization by waveform check doc id 18164 rev 2 15/27 performed by adding a capacitor on each dvs pin, as indicated before in section 1.2 . in figure 15 and 16 , ic behavior corresponding to differ ent values of rc sensing circuit is shown. it is important to point out that this fine tuning must be done at the maximum operating temperature because the r ds(on) increases significantly with temperature, moving the corresponding turn-off forward. an over-delayed turn-off must be avoided because, if the mosfet is turned off after the drain current goes to zero, the resulting current reversal produces a series of possible adverse effects, ranging from an efficiency drop to the converter's catastrophic failure. a good rule of thumb is to keep at least a 50/100 ns margin before the zero current point, because it has negligible impact on efficiency and it is a safe margin in the case of abrupt load changes or other disturbances. figure 17 shows the case of operation above resonance. note how the current flowing through the mosfet exhibits a very steep edge while decreasing down to zero. in this case, no external capacitors are implemented because a further delay could cause a current reversal. figure 17. operation above resonance frequency figure 15. sr mosfet turn-off figure 16. sr mosfet turn-off - detail ch3: sr fet current ch2: sr fet gate ch4: primary current ch3: sr fet current ch2: sr fet gate ch4: primary current ch3: sr fet current ch2: sr fet gate ch4: primary current
sensing optimization by waveform check AN3303 16/27 doc id 18164 rev 2 3.2 mosfet turn-on delay compensation as discussed in section 1.2 , the rc circuit added to fine tune the turn-off timing has the side effect of also delaying the turn-on. it was stated that to avoid this effect, a bypass diode plus a series resistor can be mounted in parallel to the sensing resistor. figure 18 and 19 below show the turn-on delay improvement using this solution. 3.3 sub-harmonic oscillation figure 20 shows the behavior described in section 1.3 . at light load the turn-off threshold (in terms of current) is quite close to the peak current value. this causes a duty cycle oscillation around the current peak . this duty oscillation causes th e secondary current to fluctuate, therefore amplifying the phenomenon. the 50 % blanking time implemented in the srk2000 limits the oscillation width, which woul d otherwise further incr ease causing output instability. figure 20. duty cycle oscillation figure 18. sr mosfet turn-on figure 19. sr mosfet turn-on - detail ch3: sr fet current ch2: sr fet gate ch4: primary current ch3: sr fet current ch2: sr fet gate ch4: primary current
AN3303 how to implement the board in the converter doc id 18164 rev 2 17/27 4 how to implement the board in the converter the demonstration board is intended to implement synchronous rectification in an llc resonant converter with center-tap secondary winding. if the converter implements diode rectification, rectifiers must be removed and the board must be connected as indicated in figure 21 . connect the transformer center-tap to the converter output. tie the other two secondary outputs respectively to pins 1, 2, 3 and to pins 11, 12, 13; bond pins 4, 5, 9, and 10 to secondary ground. the central pin 7 is for supplying the srk2000 and can be connected to the converter output. pins 6 and 8 are connected to the en pin and can be used to inhibit the ic remotely. the board connector pin-out is perfectly symmetrical and, if necessary for mechanical issues, the board tie to the converter can be rotated by 180. figure 21. how to implement the board on an existing converter
power losses and thermal design AN3303 18/27 doc id 18164 rev 2 5 power losses and thermal design sr dramatically reduces output rectification power losses enabling the design of more efficient power supplies and, even more significant, with a considerable reduction of converter secondary side size. to get a better idea of the improvement obtained by implementing sr with the srk2000, power loss calculation in a 12 v-150 w application (see reference 2 ) is illustrated below. 5.1 power losses calculation the average output current of a 12 v-150 w power supply at nominal load is: equation 4 the average current flowing through each output rectifier is: equation 5 and the rms current is approximately: equation 6 to evaluate power losses, a suitable diode and mosfet part numbers were selected. in the case of diode rectification the stps20l45c was selected (see reference 3 ). the power losses associated to each rectifier can be calculated using the formula indicated in the stps20l45c datasheet: equation 7 in the case of sr, the selected mosfet is the stl140n4llf5, which is actually mounted on evlsrk2000-l-40. capacitive losses associated to the mosfet turn-on are negligible because each mosfet is turned on after its body diode starts conducting. also losses at turn-off are of minor concern because, after the mosfet is turned off, the current goes on flowing through the diode. supposing the mosfet turn-on and turn-off timing are optimized as described in section 3 , losses associated to the current flowing throug h the body diodes can be neglected too. most sr mosfet losses can be summarized into conduction losses: equation 8 i 0 p 0 v 0 ------ 12.50 a = = i avg i 0 2 --- - 6.25 a = = i rms 4 -- - i 0 9.82 a = = p diode 0.28 i avg 0.022 i rms 2 3.87 w = ? + ? = p mos r ds on () i rms 2 265 mw = ? =
AN3303 power losses and thermal design doc id 18164 rev 2 19/27 in addition, the power consumption of the srk2000 must be taken into account: for a rough estimate, consider the ic quiescent current indicated in the srk2000 datasheet (i q ) and the energy required for sr mosfet driving (e zvs ). equation 9 where vgs is the gate driver high level, vm is the mosfet turn-on threshold, and q g , q gd , and q gs are the charges associated to mosfet gate driving and are specified in the srk2000 datasheet. a detailed explanation on the calculating energy required to drive mosfets in zvs is reported in appendix a of the an2644 application note (see reference 5 ). equation 10 finally, at full load, the total power saving obtained by implementing sr with respect to diode rectification is calculated as follows: equation 11 a power saving of 7.05 w corresponds to a 4.7 % efficiency boost on a 150 w converter. 5.2 thermal design consideration the improvement in efficiency obtained by implementing sr allows dramatic squeezing of the converter secondary side. this becomes ev ident when comparing the heatsink required in case of diode rectification with that required if sr is employed. considering the diode rectification, the maximum junction temperature of the selected diode is 150 c. consider 125 c as the maximum tolerable temperature keeping some margin to improve system reliability. supposing an am bient temperature of 60 c, the maximum allowed thermal rise is 65 c. considering the power dissipation per diode calculated in equation 7 , the maximum junction-to-ambient thermal resistance allowed is: equation 12 it is possible to assume that the thermal resistance between the to-220fp case and the heatsink is r th(c-hs) =1 c/w. as a consequence, each diode rectifier needs a heatsink with a thermal resistance of: equation 13 e zvs 1 2v gs v m ? () --------------------------------- - 2v gs 2 v m 2 + () q g q gd ? () v gs 2v gs v m + () q gs ? [] 765 n = = p srk2000 i q vcc ? () 2e zvs f sw ?? () 159 mw = + = p 2p diode 2p mos p srk2000 + ? () 7.05 w = ? ? = r th j amb ? () 65 c p diode ----------------- 17 cw ? = = r th hs amb ? () r th j amb ? () r th j c ? () ? r th c hs ? () 15 cw ? = ? =
power losses and thermal design AN3303 20/27 doc id 18164 rev 2 considering now the case with sr: again the thermal rise is 65 c. based on the power dissipation per mosfet calculated in equation 8 , the maximum junction-to-ambient thermal resistance allowed is: equation 14 that means that a heatsink is not required, just some copper area is needed, calculated according to the srk2000 datasheet indication. the same is true for the srk2000: equation 15 this is higher than the controller junction-to-ambient thermal resistance (150 c/w). r th j amb ? () 65 c p mos --------------- 245 cw ? = = r th j amb ? () 65 c p srk2000 ------------------------ - 409 cw ? = =
AN3303 layout considerations doc id 18164 rev 2 21/27 6 layout considerations the ic is designed with two ground pins, sgnd and pgnd. sgnd is used as the ground reference for all the internal high precision analog blocks. pgnd, on the other hand, is the ground reference for all the digital blocks, as well as the current return for the gate drivers. listed below are the main recommendations that should be taken into account when designing the pcb: close the output current loop as short as possible by connecting the sr mosfet drains as close as possible to the transformer termination. route the connection between the two mosfet drains and transformer terminals symmetrically to each other. connect the mosfet sources close to the output capacitor ground terminals. route the trace that connects mosfet sources to the srk2000 pgnd pin as short as possible and separately from the load current return path. keep the source terminals of both sr mosfets as close as possible to one another. design the pcb as geometrically symmetrical as possible to help make the circuit operation as electrically symmetrical as possible. the sgnd pin must be directly connected to the pgnd pin using a path as short as possible (under the device body). connect the drain voltage sensing resistor as physically close to the drain terminals as possible: any stray inductance involved by the load current that is in the drain-to-source voltage sensing circuit may significantly alter the current reading, leading to a premature turn-off of the sr mosfet. use bypass ceramic capacitors between vc c and both sgnd and pgnd. they should be located as close to the ic pins as possible. sometimes, a series resistor (in the ten) between the converter?s output voltage and the vcc pin, forming an rc filter along with the bypass capacitor, is useful to get a cleaner vcc voltage. figure 22. board layout
bill of materials AN3303 22/27 doc id 18164 rev 2 7 bill of materials table 2. evlsrk2000-l-40 bill of materials ref value/pn description supplier case c501 4.7 nf 50 v cercap x7r - general purpose bccomponents 0805 c502 100 nf 50 v cercap x7r - general purpose bccomponents 0805 c503 1 f 50 v cercap x7r - general purpose bccomponents 0805 d501 bas316 fast switching signal diode vishay sod-323 d502 bas316 fast switching signal diode vishay sod-323 jp501 header 13 strip connector q501 stl140n4llf5 n-channel power mo sfet stmicroelectronics powerflat? q502 stl140n4llf5 n-channel power mo sfet stmicroelectronics powerflat? r501 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r502 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r503 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 1206 r504 150 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r505 33 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r506 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r507 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 rx1 0 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 u501 srk2000d sr driver for llc resonant converter stmicroelectronics so-8 table 3. evlsrk2000-l-60 bill of materials ref value/pn description supplier case c501 4.7 nf 50 v cercap x7r - general purpose bccomponents 0805 c502 100 nf 50 v cercap x7r - general purpose bccomponents 0805 c503 1 f 50 v cercap x7r - general purpose bccomponents 0805 d501 bas316 fast switching signal diode vishay sod-323 d502 bas316 fast switching signal diode vishay sod-323 jp501 header 13 strip connector q501 stl85n6f3 n-channel power mosfet stmicroelectronics powerflat? q502 stl85n6f3 n-channel power mosfet stmicroelectronics powerflat? r501 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r502 10 smd std film res - 1/8w - 5 % - 200 ppm/c bccomponents 0805 r503 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 1206
AN3303 bill of materials doc id 18164 rev 2 23/27 r504 150 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r505 33 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r506 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r507 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 rx1 0 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 u501 srk2000d sr driver for llc resonant converter stmicroelectronics so-8 table 3. evlsrk2000-l-60 bill of materials (continued) ref value/pn description supplier case table 4. evlsrk2000-s-40 bill of materials ref value/pn descrip tion supplier case c501 4.7 nf 50 v cercap x7r - general purpose bccomponents 0805 c502 100 nf 50 v cercap x7r - general purpose bccomponents 0805 c503 1 f 50 v cercap x7r - general purpose bccomponents 0805 d501 bas316 fast switching signal diode vishay sod-323 d501a bas316 fast switching signal diode vishay sod-323 d502 bas316 fast switching signal diode vishay sod-323 d502a bas316 fast switching signal diode vishay sod-323 jp501 header 13 strip connector q501 sts15n4llf3 n-channel power mosfet stmicroelectronics so-8 q501a sts15n4llf3 n-channel power mosfet stmicroelectronics so-8 q502 sts15n4llf3 n-channel power mosfet stmicroelectronics so-8 q502a sts15n4llf3 n-channel power mosfet stmicroelectronics so-8 r501 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r501a 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r502 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r502a 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r503 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 1206 r504 150 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r505 33 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r506 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r507 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 rx1 0 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 u501 srk2000d sr driver for llc resonant converter stmicroelectronics so-8
bill of materials AN3303 24/27 doc id 18164 rev 2 table 5. evlsrk2000-d-40 bill of materials ref value/pn description supplier case c501 4.7 nf 50 v cercap x7r - general purpose bccomponents 0805 c502 100 nf 50 v cercap x7r - general purpose bccomponents 0805 c503 1 f 50 v cercap x7r - general purpose bccomponents 0805 d501 bas316 fast switching signal diode vishay sod-323 d502 bas316 fast switching signal diode vishay sod-323 jp501 header 13 strip connector q501 std95n4f3 n-channel power mosfet stmicroelectronics d-pak q502 std95n4f3 n-channel power mosfet stmicroelectronics d-pak r501 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r502 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r503 10 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 1206 r504 150 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r505 33 k smd std film res - 1/8 w - 1 % - 100 ppm/c bccomponents 0805 r506 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 r507 330 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 rx1 0 smd std film res - 1/8 w - 5 % - 200 ppm/c bccomponents 0805 u501 srk2000d sr driver for llc resonant converter stmicroelectronics so-8
AN3303 references doc id 18164 rev 2 25/27 8 references 1. srk2000 datasheet 2. an3233 application note 3. stps20l45c datasheet 4. stl140n4llf5 datasheet 5. an2644 application note
revision history AN3303 26/27 doc id 18164 rev 2 9 revision history table 6. document revision history date revision changes 20-jan-2011 1 initial release. 20-sep-2011 2 updated figure 12 on page 13 .
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